TMM2018: Difference between revisions
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| Line 16: | Line 16: | ||
_| TMM2018D |_ | _| TMM2018D |_ | ||
A2 |_|6 19|_| A10 | A2 |_|6 19|_| A10 | ||
_| | _| 16384 Bit |_ | ||
A1 |_|7 | A1 |_|7 2048 Bytes 18|_| CS | ||
_| |_ | _| |_ | ||
A0 |_|8 17|_| I/O 7 | A0 |_|8 17|_| I/O 7 | ||
| Line 23: | Line 23: | ||
I/0 0 |_|9 16|_| I/O 6 | I/0 0 |_|9 16|_| I/O 6 | ||
_| |_ | _| |_ | ||
I/0 1 |_|10 15|_| I/O 5 | |||
_| |_ | _| |_ | ||
I/0 2 |_|11 14|_| I/O 4 | |||
_| |_ | _| |_ | ||
GND/VSS |_|12 13|_| I/O 3 | |||
|______________________| | |______________________| | ||
*WE - Write Enable | |||
*CS - Chip Select | |||
*OE - Output Enable | |||
Latest revision as of 21:31, 9 March 2011
Pin Arrangement[edit]
_________ _________
_| \__/ |_
A7 |_|1 24|_| VCC
_| |_
A6 |_|2 23|_| A8
_| |_
A5 |_|3 22|_| A9
_| |_
A4 |_|4 21|_| WE
_| |_
A3 |_|5 20|_| OE
_| TMM2018D |_
A2 |_|6 19|_| A10
_| 16384 Bit |_
A1 |_|7 2048 Bytes 18|_| CS
_| |_
A0 |_|8 17|_| I/O 7
_| |_
I/0 0 |_|9 16|_| I/O 6
_| |_
I/0 1 |_|10 15|_| I/O 5
_| |_
I/0 2 |_|11 14|_| I/O 4
_| |_
GND/VSS |_|12 13|_| I/O 3
|______________________|
- WE - Write Enable
- CS - Chip Select
- OE - Output Enable
